Employment History
MDA | Jr. Member, Technical Staff, Satellite Systems - FPGA Design Engineer
NOVEMBER 2022 - PRESENT | MONTREAL, QC
- PROJECT 1:
- Designed 6 modules in VHDL that successfully passed verification checks and lab testing
- Added radiation protection to 6 modules such that the effect of single-event upsets are minimized
- Wrote a shell script that successfully combined the coverage reports of all modules in the project
- Taught two colleagues how to use a code review tool (crucible) such that they were able to use it immediately afterwards
- Documented module designs such that were easily understood by the customer
- PROJECT 2:
- Designed a module in VHDL from requirements that chooses data from 4 streams based on a priority system and a round robin secondary system
- Set up a Versal FPGA in the lab to test RTL
- PROJECT 3:
- Wrote a python script that mimicked design logic that was used to check outputs of the device in the lab
- Adapted a python script to write to various registers and test the device response in the lab
PROVIDENCE HEALTH CARE | BIOMEDICAL ENGINEER INTERN
MAY 2024 - AUGUST 2024 | VANCOUVER, BC
- refined Lower Mainland Biomedical Engineering's scope with regards to the assessment of research devices within VCHA, PHSA, PHC and FHA
- informed the biomedical engineering team about the process of updating standards and the structure of the BC diagnostic accreditation program
KARDIUM INC. | ELECTRICAL ENGINEER CO-OP
JANUARY 2019 - AUGUST 2019 | VANCOUVER, BC
- Created testbenches in VHDL to successfully identify bugs in a product
- Developed solutions in VHDL to successfully correct bugs in a product
- Performed electrical verification testing on features of a product
- Assisted on development of cables that were used in animal trials
- Designed a python script to perform analysis of warnings and errors from VHDL builds
INTEL OF CANADA | ECC RTL, SOFTWARE, FPGA DESIGN (CO-OP)
MAY 2018 - DECEMBER 2018 | VANCOUVER, BC
- Designed error correction RTL in Verilog and SystemVerilog that correctly encoded and decoded data to the specifications of a product
- Created software models in C which were used in combination with SystemVerilog testbenches to debug error correction RTL
UBC DEPARTMENT OF ELECTRICAL AND COMPUTER ENGINEERING | CO-OP ASSISTANT
MAY 2017 - AUGUST 2017 | VANCOUVER, BC
- Restructured and updated the engineering services website ensuring easier access to information and a more intuitive website hierarchy
- Worked with Altium Designer to prepare mixed-signal simulation testbenches for a set of common IC's used in courses
BYTE CAMP | LEAD INSTRUCTOR
JULY 2016 - AUGUST 2016 | CALGARY, AB
- Taught JavaScript, Vector Art and Animation skills to camps of sizes 10-20 for kids ages 9-14, resulting in all kids returning home at the end of the week with either a completed video game or animation
- Ran breaks and activities for camps of sizes 10-20 and ensured that activities were both fun and safe and as a result got 100% positive feedback from parents
WESTSIDE RECREATION CENTRE | LIFEGUARD & SWIM INSTRUCTOR
SEPTEMBER 2013 - JUNE 2015 | CALGARY, AB
- Enforced policies to patrons on safe aquatic practices in a busy pool environment, leading to 0 life-threatening emergencies
- Taught private swimming lessons for swimmers of all ages with individual learning interests or disabilities, which resulted in a letter of praise from one parent
- Ran swimming and leadership lessons for groups of sizes 5-10 of all ages ensuring that the individual needs of each participant were addressed, resulting in a 80% pass-rate
- Treated minor and major injuries by keeping the patron calm and identifying proper treatment, resulting in full recovery for all patrons